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300 ma, low dropout cmos linear regulator ADP1712/adp1713/adp1714 rev. 0 information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2007 analog devices, inc. all rights reserved. features maximum output current: 300 ma input voltage range: 2.5 v to 5.5 v light load efficient i gnd = 75 a with 100 a load low shutdown current: <1 a very low dropout voltage: 170 mv @ 300 ma load initial accuracy: 1% accuracy over line, load, and temperature: 2% 16 fixed output voltage options with soft start: 0.75 v to 3.3 v (ADP1712) adjustable output voltage option: 0.8 v to 5.0 v (ADP1712 adjustable) 16 fixed output voltage options with reference bypass: 0.75 v to 3.3 v (adp1713) 16 fixed output voltage options with tracking: 0.75 v to 3.3 v (adp1714) low output noise: 40 v rms high psrr: 72 db @ 1 khz stable with small 2.2 f ceramic output capacitor excellent load/line transient response current limit and thermal overload protection logic controlled enable 5-lead tsot package applications mobile phones digital camera and audio devices portable and battery-powered equipment post dc-dc regulation typical application circuits in gnd en out ss 1 2 3 5 4 ADP1712 2.2f 06455-001 v out = 3.3v v in = 5v 2.2f 10nf figure 1. ADP1712 with fixed output voltage and soft-start capacitor, 3.3 v in gnd en out adj 1 2 3 5 4 a dp1712 adjustable 2 .2 f 2.2f r1 r2 06455-002 v out = 0.8v(1 + r1/r2) v in = 5.5v figure 2. ADP1712 with adjustable output voltage, 0.8 v to 5.0 v in gnd en out byp 1 2 3 5 4 adp1713 2.2 f 2.2f 10nf 06455-003 v in = 3v v out = 0.75v figure 3. adp1713 with fixed output voltage and bypass capacitor, 0.75 v in gnd en out trk 1 2 3 5 4 2.2f 2.2f 0v to 5v 3 2 1 0 06455-004 v trk (v) 12345 v out (v) v out a dp1714 v in = 3v figure 4. adp1714 with output voltage tracking general description the ADP1712/adp1713/adp1714, available in a tiny, 5-lead tsot package, are low dropout linear regulators that operate from 2.5 v to 5.5 v and provide up to 300 ma of output current. the low 170 mv dropout voltage at a 300 ma load improves efficiency and allows operation over a wide input voltage range. using a novel scaling architecture, ground current is a very low 75 a when driving a 100 a load, making the ADP1712/ adp1713/adp1714 ideal for battery-operated portable equipment. the ADP1712/adp1713/adp1714 are available in 16 fixed output voltage options. the ADP1712 is also available in an adjustable version, which allows output voltages that range from 0.8 v to 5 v via an external divider. the ADP1712 fixed version allows an external capacitor to be connected to program the soft-start time. the adp1713 allows a reference bypass capacitor to be connected, which reduces output voltage noise and improves power supply rejection. the adp1714 includes a tracking feature, which allows the output to follow an external voltage rail or reference. the ADP1712/adp1713/adp1714 are optimized for stable operation with small 2.2 f ceramic output capacitors, allowing good transient performance while occupying minimal board space. an enable pin controls the output voltage on all devices, and an undervoltage lockout circuit disables the regulator if in drops below a minimum threshold. the parts also have short circuit protection and thermal overload protection, which prevent damage to the devices in adverse conditions.
ADP1712/adp1713/adp1714 rev. 0 | page 2 of 16 table of contents features .............................................................................................. 1 applications....................................................................................... 1 typical application circuits............................................................ 1 general description ......................................................................... 1 revision history ............................................................................... 2 specifications..................................................................................... 3 absolute maximum ratings............................................................ 5 thermal resistance ...................................................................... 5 esd caution.................................................................................. 5 pin configurations and function descriptions ........................... 6 typical performance characteristics ............................................. 7 theory of operation ...................................................................... 10 soft-start function (ADP1712)................................................ 10 adjustable output voltage (ADP1712 adjustable) ............... 11 bypass capacitor (adp1713) ................................................... 11 track mode (adp1714) ............................................................ 11 enable feature ............................................................................ 11 undervoltage lockout (uvlo) ............................................... 11 application information................................................................ 12 capacitor selection .................................................................... 12 current limit and thermal overload protection ................. 12 thermal considerations............................................................ 13 printed circuit board layout considerations ....................... 14 outline dimensions ....................................................................... 15 ordering guide .......................................................................... 15 revision history 1/07revision 0: initial version
ADP1712/adp1713/adp1714 rev. 0 | page 3 of 16 specifications v in = (v out + 0.5 v) or 2.5 v (whichever is greater), i out = 10 ma, c in = c out = 2.2 f, t a = 25c, unless otherwise noted. table 1. parameter symbol conditions min typ max unit input voltage range v in t j = C40c to +125c 2.5 5.5 v operating supply current i gnd i out = 0 a 60 a i out = 0 a, t j = C40c to +125c 70 a i out = 100 a 75 a i out = 100 a, t j = C40c to +125c 85 a i out = 100 ma 210 a i out = 100 ma, t j = C40c to +125c 250 a i out = 300 ma 365 a i out = 300 ma, t j = C40c to +125c 420 a shutdown current i gnd-sd en = gnd 0.1 a en = gnd, t j = C40c to +125c 1.0 a fixed output voltage v out i out = 10 ma C1 +1 % accuracy (ADP1712 fixed, 100 a < i out < 300 ma, t j = C40c to +125c C2 +2 % adp1713, and adp1714) adjustable output voltage v out i out = 10 ma 0.792 0.8 0.808 v accuracy (ADP1712 adjustable) 1 100 a < i out < 300 ma, t j = C40c to +125c 0.784 0.8 0.816 v line regulation ?v out /?v in v in = (v out + 0.5 v) to 5.5 v, t j = C40c to +125c C0.25 +0.25 %/ v load regulation 2 ?v out /?i out i out = 10 ma to 300 ma 0.001 %/ma i out = 10 ma to 300 ma, t j = C40c to +125c 0.004 %/ma dropout voltage 3 v dropout i out = 100 ma, v out 3.0 v 60 70 mv i out = 100 ma, v out 3.0 v, t j = C40c to +125c 80 mv i out = 300 ma, v out 3.0 v 170 205 mv i out = 300 ma, v out 3.0 v, t j = C40c to +125c 230 mv i out = 100 ma, 2.5 v v out < 3.0 v 70 85 mv i out = 100 ma, 2.5 v v out < 3.0 v, t j = C40c to +125c 95 mv i out = 300 ma, 2.5 v v out < 3.0 v 200 235 mv i out = 300 ma, 2.5 v v out < 3.0 v, t j = C40c to +125c 270 mv start-up time 4 t start-up ADP1712 adjustable and adp1714 70 s ADP1712 external soft start c ss = 10 nf 7.3 ms adp1713 with 10 nf bypass capacitor 90 s current limit threshold 5 i limit 380 500 700 ma thermal shutdown threshold ts sd t j rising 150 c thermal shutdown hysteresis ts sd-hys 15 c soft-start source current ss i-source ss = gnd 0.8 1.2 1.5 a (ADP1712 with external soft start) uvlo active threshold uvlo active v in falling 2 v uvlo inactive threshold uvlo inactive v in rising 2.45 v uvlo hysteresis uvlo hys 250 mv v out to v trk accuracy (adp1714) v trk-error 0 v v trk (0.5 v out(nom) ), v out(nom) 1.8 v, t j = C40c to +125c C40 +40 mv 0 v v trk (0.5 v out(nom) ), v out(nom) > 1.8 v, t j = C40c to +125c C80 +80 mv
ADP1712/adp1713/adp1714 rev. 0 | page 4 of 16 parameter symbol conditions min typ max unit en input logic high v ih 2.5 v v in 5.5 v 1.8 v en input logic low v il 2.5 v v in 5.5 v 0.4 v en input leakage current v i-leakage en = in or gnd 0.1 1 a adj input bias current (ADP1712 adjustable) adj i-bias 30 100 na output noise out noise adp1713 10 hz to 100 khz, v in = 5.0 v, v out = 0.75 v, with 10 nf bypass capacitor 40 v rms ADP1712 and adp1714 10 hz to 100 khz, v in = 5.0 v, v out = 3.3 v 380 v rms power supply rejection ratio psrr adp1713 1 khz, v in = 5.0 v, v out = 0.75 v, with 10 nf bypass capacitor 72 db ADP1712 and adp1714 1 khz, v in = 5.0 v, v out = 3.3 v 65 db 1 accuracy when out is connected directly to adj. when out voltage is set by external feedback resistors, absolute accuracy in a djust mode depends on the tolerances of resistors used. 2 based on an en d-point calculation using 10 ma and 300 ma loads. see figure 10 for typical lo ad regulation performance for load s less than 10 ma. 3 dropout voltage is defined as the input-to-output voltage differe ntial when the input voltage is set to the nominal output vol tage. this applies only for output voltages above 2.5 v. 4 start-up time is defined as the time between the rising edge of en to out being at 95% of its nominal value. 5 current limit threshold is defi ned as the current at which the output voltage dr ops to 90% of the specif ied typical value. for example, the current limit for a 1.0 v output voltage is defined as the curre nt that causes the output voltage to drop to 90% of 1.0 v, or 0.9 v.
ADP1712/adp1713/adp1714 rev. 0 | page 5 of 16 absolute maximum ratings table 2. parameter rating in to gnd C0.3 v to +6 v out to gnd C0.3 v to in en to gnd C0.3 v to +6 v ss/adj/byp/trk to gnd C0.3 v to +6 v storage temperature range C65c to +150c operating junction temperature range C40c to +125c lead temperature, soldering (10 sec) 300c soldering conditions jedec j-std-020 stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. thermal resistance ja is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. table 3. thermal resistance package type ja unit 5-lead tsot 170 c/w esd caution
ADP1712/adp1713/adp1714 rev. 0 | page 6 of 16 pin configurations and function descriptions in g nd en out ss 1 2 3 5 4 ADP1712 fixed top view (not to scale) 06455-005 in g nd en out adj 1 2 3 5 4 ADP1712 adjustable top view (not to scale) 06455-006 in gnd en out byp 1 2 3 5 4 adp1713 top view (not to scale) 06455-007 in gnd en out trk 1 2 3 5 4 adp1714 top view (not to scale) 06455-008 figure 5. 5-lead tsot (uj-suffix) figure 6. 5-lead tsot (uj-suffi x) figure 7. 5-lead tsot (uj-suffix) figure 8. 5-lead tsot (uj-suffix) table 4. pin function descriptions ADP1712 fixed pin no. ADP1712 adjustable pin no. adp1713 pin no. adp1714 pin no. mnemonic description 1 1 1 1 in regulator input supply. bypass in to gnd with a 2.2 f or greater capacitor. 2 2 2 2 gnd ground. 3 3 3 3 en enable input. drive en high to turn on the regulator; drive it low to turn off the regulator. for automatic startup, connect en to in. 4 ss soft start. connect a capacitor between ss and gnd to set the output start-up time. 4 adj adjust. a resistor divider from out to adj sets the output voltage. 4 byp bypass. connect a 1 nf or greater capacitor (10 nf recommended) between byp and gnd to reduce the internal reference noise for low noise applications. 4 t r k track. the output follows the voltage placed on the trk pin. (see the theory of operation section for a more detailed description.) 5 5 5 5 out regulated output voltage. bypass out to gnd with a 2.2 f or greater capacitor.
ADP1712/adp1713/adp1714 rev. 0 | page 7 of 16 typical performance characteristics v in = 3.8 v, i out = 10 ma, c in = c out = 2.2 f, t a = 25c, unless otherwise noted. 3.32 3.31 3.30 3.29 3.28 3.27 3.26 ?40 t j (c) v out (v) i load = 100a i load = 1ma i load = 10ma i load = 100ma i load = 200ma i load = 300ma 10 60 110 06455-009 figure 9. output voltage vs. junction temperature 3.304 3.290 0.1 1000 i load (ma) v out (v) 1 10 100 3.302 3.300 3.298 3.296 3.294 3.292 06455-010 figure 10. output voltage vs. load current v in (v) v out (v) 3.280 3.285 3.290 3.295 3.300 3.305 5.3 3.3 3.8 4.3 4.8 i load = 100a i load = 1ma i load = 10ma i load = 100ma i load = 200ma i load = 300ma 06455-011 figure 11. output voltage vs. input voltage 450 0 ?40 t j (c) i gnd (a) 10 60 110 400 350 300 250 200 150 100 50 i load = 100a i load = 1ma i load = 10ma i load = 100ma i load = 200ma i load = 300ma 06455-012 figure 12. ground current vs. junction temperature 400 0 0.1 1000 i load (ma) i gnd (a) 1 10 100 350 300 250 200 150 100 50 06455-013 figure 13. ground current vs. load current v in (v) i gnd (a) 0 500 5.3 3.3 3.8 4.3 4.8 450 400 350 300 250 200 150 100 50 i load = 300ma i load = 200ma i load = 100ma i load = 1ma i load = 10ma i load = 100a 06455-014 figure 14. ground current vs. input voltage
ADP1712/adp1713/adp1714 rev. 0 | page 8 of 16 180 0 0.1 1000 i load (ma) v dropout (mv) 1 10 100 160 140 120 100 80 60 40 20 06455-015 figure 15. dropout voltage vs. load current 3.35 3.00 3.20 3.60 v in (v) v out (v) 3.30 3.25 3.20 3.15 3.10 3.05 3.25 3.30 3.35 3.40 3.45 3.50 3.55 i load = 100a i load = 1ma i load = 10ma i load = 100ma i load = 200ma i load = 300ma 06455-016 figure 16. output voltage vs. input voltage (in dropout) 1000 0 3.20 3.60 v in (v) i gnd (a) 900 800 700 600 500 400 300 200 100 3.25 3.30 3.35 3.40 3.45 3.50 3.55 i load = 300ma i load = 200ma i load = 100ma i load = 10ma i load = 100a i load = 1ma 06455-017 figure 17. ground current vs. input voltage (in dropout) time (20 s/div) 20mv/di v load switched from 10ma to 300ma v out v in = 5v v out = 3.3v c in = 2.2 f c out = 2.2 f 06455-018 figure 18. load transient response time (20 s/div) 20mv/di v v out v in = 5v v out = 3.3v c in = 10 f c out = 10 f load switched from 10ma to 300ma 06455-019 figure 19. load transient response time (100 s/div) v out 10mv/di v 2v/di v v in = 5v v out = 3.3v c in = 10 f c out = 10 f i load = 300ma v in step from 4v to 5v 1 2 06455-020 figure 20. line transient response
ADP1712/adp1713/adp1714 rev. 0 | page 9 of 16 c ss (nf) ramp-up time (ms) 16 0 02 ? 5 50 ?70 2.7 4.7 4.2 3.7 3.2 v in (v) psrr (db) 14 12 10 8 6 4 2 5 101520 06455-036 figure 21. output voltage ramp-up ti me vs. soft-start capacitor value 0 ?90 10 10m frequency (hz) psrr (db) 100 1k 10k 100k 1m ?10 ?20 ?30 ?40 ?50 ?60 ?70 ?80 i load = 100ma i load = 10ma i load = 1ma i load = 100a v ripple = 50mv v in = 5v v out = 0.75v c out = 2.2 f 06455-037 figure 22. adp1713 power supply rejection ratio vs. frequency (10 nf bypass capacitor) v ripple = 50mv i load = 10ma c out = 2.2 f frequency = 10khz ?55 ?60 ?65 v out = 2.4v v out = 1.6v v out = 0.8v 06455-038 figure 23. ADP1712 adjustable power supply rejection ratio vs. input voltage ? 45 ?70 0.8 4.3 3.8 3.3 2.8 2.3 1.8 1.3 v out (v) psrr (db) ?50 ?55 ?60 ?65 i load = 10ma i load = 100ma v ripple = 50mv v in = 5v c out = 2.2 f frequency = 10khz 06455-039 figure 24. ADP1712 adjustable power supply rejection ratio vs. output voltage
ADP1712/adp1713/adp1714 rev. 0 | page 10 of 16 theory of operation the ADP1712/adp1713/adp1714 are low dropout linear regula- tors that use an advanced, proprietary architecture to provide high power supply rejection ratio (psrr) and excellent line and load transient response with just a small 2.2 f ceramic output capac- itor. all devices operate from a 2.5 v to 5.5 v input rail and provide up to 300 ma of output current. incorporating a novel scaling architecture, ground current is very low when driving light loads. ground current in the shutdown mode is typically less than 1 a. reference current limit thermal protect shutdown and uvlo gnd out ss/ adj/ byp/ trk in en 06455-023 figure 25. internal block diagram internally, the ADP1712/adp1713/adp1714 each consist of a reference, an error amplifier, a feedback voltage divider, and a pmos pass transistor. output current is delivered via the pmos pass device, which is controlled by the error amplifier. the error amplifier compares the reference voltage with the feedback volt- age from the output and amplifies the difference. if the feedback voltage is lower than the reference voltage, the gate of the pmos device is pulled lower, which allows more current to pass and increases the output voltage. if the feedback voltage is higher than the reference voltage, the gate of the pmos device is pulled higher, allowing less current to pass and decreasing the output voltage. the ADP1712 is available in two versions, one with a fixed output voltage and one with an adjustable output voltage. the fixed output voltage is set internally to one of sixteen values between 0.75 v and 3.3 v, using an internal feedback network. the adjustable output voltage can be set to between 0.8 v and 5.0 v by an external voltage divider connected from out to adj. the adp1713 and adp1714 are available in fixed output voltage options only. the ADP1712 fixed version allows an external soft-start capacitor to be connected between the ss pin and gnd, which controls the output voltage ramp during startup. the adp1713 allows a reference bypass capacitor to be connected between the byp pin and gnd, which reduces output voltage noise and improves power supply rejection. the adp1714 features a track pin, which allows the output voltage to follow the voltage at the trk pin. a logic on the en pin determines if the output is active. when en is high, the output is on, and when en is low, the output is off. soft-start function (ADP1712) for applications that require a controlled startup, the ADP1712 provides a programmable soft-start function. programmable soft start is useful for reducing inrush current upon startup and for pro- viding voltage sequencing. to implement soft start, connect a small ceramic capacitor from ss to gnd. upon startup, a 1.2 a current source charges this capacitor. the ADP1712 start-up output voltage is limited by the voltage at ss, providing a smooth ramp up to the nominal output voltage. the soft-start time is calculated by t ss = v ref ( c ss / i ss ) (1) where: t ss is the soft-start period. v ref is the 0.8 v reference voltage. c ss is the soft-start capacitance from ss to gnd. i ss is the current sourced from ss (1.2 a). when the ADP1712 is disabled (using en), the soft-start capacitor is discharged to gnd through an internal 100 resistor. time (4ms/div) 2v/div 1 2v/div 2 en out v in = 5v v out = 3.3v c out = 2.2 f c ss = 22nf i load = 300ma 0 6455-040 figure 26. out ramp-up with ex ternal soft-start capacitor the ADP1712 adjustable version, adp1713, and adp1714 have no pins for soft start, so the function is switched to an internal soft-start capacitor. this sets the soft-start ramp-up period to approximately 24 s. time (20s/div) 2v/div 1 1v/div 2 en out v in = 5v v out = 1.6v c out = 2.2 f i load = 10ma 0 6455-041 figure 27. out ramp-up wi th internal soft-start
ADP1712/adp1713/adp1714 rev. 0 | page 11 of 16 5 adjustable output voltage (ADP1712 adjustable) the ADP1712 adjustable version can have its output voltage set over a 0.8 v to 5.0 v range. the output voltage is set by connecting a resistive voltage divider from out to adj. the output voltage is calculated using the equation v out = 0.8 v (1 + r1 / r2 ) (2) where: r1 is the resistor from out to adj. r2 is the resistor from adj to gnd. the maximum bias current into adj is 100 na, so for less than 0.5% error due to the bias current, use values less than 60 k for r2. bypass capacitor (adp1713) the adp1713 allows for an external bypass capacitor to be connected to the internal reference, which reduces output voltage noise and improves power supply rejection. a low leakage capacitor of 1 nf or greater (10 nf is recommended) must be connected between the byp and gnd pins. track mode (adp1714) the adp1714 includes a tracking mode feature. as shown in figure 28 , if the voltage applied at the trk pin is less than the nominal output voltage, out is equal to the voltage at trk. otherwise, out regulates to its nominal output value. for example, consider an adp1714 with a nominal output voltage of 3 v. if the voltage applied to its trk pin is greater than 3 v, out maintains a nominal output voltage of 3 v. if the volt- age applied to trk is reduced below 3 v, out tracks this voltage. out can track the trk pin voltage from the nominal value all the way down to 0 v. a voltage divider is present from trk to the error amplifier input with a divider ratio equal to the divider from out to the error amplifier. this sets the output voltage equal to the tracking voltage. both divider ratios are set by post- package trim, depending on the desired output voltage. 4 0 v trk (v) v out (v) 0 3 2 1 1234 06455-024 figure 28. adp1714 output voltage vs. tracking voltage with nominal output voltage set to 3 v enable feature the ADP1712/adp1713/adp1714 use the en pin to enable and disable the out pin under normal operating conditions. as shown in figure 29 , when a rising voltage on en crosses the active threshold, out turns on. when a falling voltage on en crosses the inactive threshold, out turns off. time (4ms/div) 500mv/di v en out v in =5v v out =1.6v c out =2.2 f i load =10ma 06455-025 1 figure 29. ADP1712 adjustable typical en pin operation as can be seen, the en pin has hysteresis built in. this prevents on/off oscillations that can occur due to noise on the en pin as it passes through the threshold points. the en pin active/inactive thresholds are derived from the in voltage. therefore, these thresholds vary with changing input voltage. figure 30 shows typical en active/inactive thresholds when the input voltage varies from 2.5 v to 5.5 v. 1.4 0.5 2.50 5.50 v in (v) typical en thresholds (v) 1.3 1.2 1.1 1.0 0.9 0.8 0.7 0.6 2.75 3.00 3.25 3.50 3.75 4.00 4.25 4.50 4.75 5.00 5.25 en inactive en active hysteresis 06455-026 figure 30. typical en pin thresholds vs. input voltage undervoltage lockout (uvlo) the ADP1712/adp1713/adp1714 have an undervoltage lockout circuit, which monitors the voltage on the in pin. when the voltage on in drops below 2 v (minimum), the circuit activates, disabling the out pin.
ADP1712/adp1713/adp1714 rev. 0 | page 12 of 16 application information capacitor selection output capacitor the ADP1712/adp1713/adp1714 are designed for operation with small, space-saving ceramic capacitors, but they function with most commonly used capacitors as long as care is taken about the effective series resistance (esr) value. the esr of the output capacitor affects stability of the ldo control loop. a minimum of 2.2 f capacitance with an esr of 500 m or less is recommended to ensure stability of the ADP1712/adp1713/adp1714. transient response to changes in load current is also affected by output capacitance. using a larger value of output capacitance improves the transient response of the ADP1712/adp1713/adp1714 to large changes in load current. figure 31 and figure 32 show the transient responses for output capacitance values of 2.2 f and 10 f, respectively. time (20 s/div) 20mv/di v v in = 5v v out = 3.3v c in = 2.2f c out = 2.2f v out response to load step from 10ma to 300ma 06455-027 figure 31. output transient response, c out = 2.2 f time (20 s/div) 20mv/di v v out response to load step from 10ma to 300ma v in = 5v v out = 3.3v c in = 10f c out = 10f 06455-028 figure 32. output transient response, c out = 10 f input bypass capacitor connecting a 2.2 f capacitor from the in pin to gnd reduces the circuit sensitivity to printed circuit board (pcb) layout, especially when long input traces or high source impedance are encountered. if greater than 2.2 f of output capacitance is required, increasing the input capacitor to match is recommended. input and output capacitor properties any good quality ceramic capacitors can be used with the ADP1712/adp1713/adp1714, as long as they meet the minimum capacitance and maximum esr requirements. ceramic capacitors are manufactured with a variety of dielectrics, each with different behavior over temperature and applied voltage. capacitors must have a dielectric adequate to ensure the minimum capacitance over the necessary temper- ature range and dc bias conditions. x5r or x7r dielectrics with a voltage rating of 6.3 v or 10 v are recommended. y5v and z5u dielectrics are not recommended, due to their poor temperature and dc bias characteristics. current limit and thermal overload protection the ADP1712/adp1713/adp1714 are protected against damage due to excessive power dissipation by current and thermal over- load protection circuits. the ADP1712/adp1713/adp1714 are designed to current limit when the output load reaches 500 ma (typical). when the output load exceeds 500 ma, the output voltage is reduced to maintain a constant current limit. thermal overload protection is included, which limits the junction temperature to a maximum of 150c (typical). under extreme conditions (that is, high ambient temperature and power dissipation), when the junction temperature starts to rise above 150c, the output is turned off, reducing the output current to zero. when the junction temperature drops below 135c (typical), the output is turned on again and output current is restored to its nominal value. consider the case where a hard short from out to ground occurs. at first the ADP1712/adp1713/adp1714 current limit, so that only 500 ma is conducted into the short. if self heating of the junction is great enough to cause its temperature to rise above 150c, thermal shutdown activates, turning off the output and reducing the output current to zero. as the junction temper- ature cools and drops below 135c, the output turns on and conducts 500 ma into the short, again causing the junction temperature to rise above 150c. this thermal oscillation between 135c and 150c causes a current oscillation between 500 ma and 0 ma, which continues as long as the short remains at the output. current and thermal limit protections are intended to protect the device against accidental overload conditions. for reliable operation, device power dissipation needs to be externally limited so junction temperatures do not exceed 125c.
ADP1712/adp1713/adp1714 rev. 0 | page 13 of 16 thermal considerations to guarantee reliable operation, the junction temperature of the ADP1712/adp1713/adp1714 must not exceed 125c. to ensure the junction temperature stays below this maximum value, the user needs to be aware of the parameters that contribute to junction temperature changes. these parameters include ambient temperature, power dissipation in the power device, and thermal resistances between the junction and ambient air ( ja ). the ja number is dependent on the package assembly compounds used and the amount of copper to which the gnd pin of the package is soldered on the pcb. table 5 shows typical ja values of the 5-lead tsot package for various pcb copper sizes. table 5. copper size (mm 2 ) ja (c/w) 0 1 170 50 152 100 146 300 134 500 131 1 device soldered to minimum size pin traces. the junction temperature of the ADP1712/adp1713/adp1714 can be calculated from the following equation: t j = t a + ( p d ja ) (3) where: t a is the ambient temperature. p d is the power dissipation in the die, given by p d = [( v in C v out ) i load ] + ( v in i gnd ) (4) where: i load is the load current. i gnd is the ground current. v in and v out are input voltage and output voltage, respectively. power dissipation due to ground current is quite small and can be ignored. therefore, the junction temperature equation simplifies to the following: t j = t a + {[( v in C v out ) i load ] ja } (5) as shown in equation 4, for a given ambient temperature, input- to-output voltage differential, and continuous load current, there exists a minimum copper size requirement for the pcb to ensure the junction temperature does not rise above 125c. the following figures show junction temperature calculations for different ambient temperatures, load currents, input-to-output voltage differentials, and areas of pcb copper. 140 0 0.5 5.0 v in ? v out (v) t j (c) 120 100 80 60 40 20 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 1ma 10ma 30ma 80ma 100ma 200ma 300ma (load current) max t j (do not operate above this point) 06455-029 figure 33. 500 mm 2 of pcb copper, t a = 25c 140 0 0.5 5.0 v in ? v out (v) t j (c) 120 100 80 60 40 20 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 1ma 10ma 30ma 80ma 100ma 200ma 300ma (load current) max t j (do not operate above this point) 06455-030 figure 34. 100 mm 2 of pcb copper, t a = 25c 140 0 0.5 5.0 v in ? v out (v) t j (c) 120 100 80 60 40 20 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 1ma 10ma 30ma 80ma 100ma 200ma 300ma (load current) max t j (do not operate above this point) 06455-031 figure 35. 0 mm 2 of pcb copper, t a = 25c
ADP1712/adp1713/adp1714 rev. 0 | page 14 of 16 140 0 0.5 5.0 v in ? v out (v) t j (c) 120 100 80 60 40 20 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 1ma 10ma 30ma 80ma 100ma 200ma 300ma (load current) max t j (do not operate above this point) 06455-032 figure 36. 500 mm 2 of pcb copper, t a = 50c 140 0 0.5 5.0 v in ? v out (v) t j (c) 120 100 80 60 40 20 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 1ma 10ma 30ma 80ma 100ma 200ma 300ma (load current) max t j (do not operate above this point) 06455-033 figure 37. 100 mm 2 of pcb copper, t a = 50c 140 0 0.5 5.0 v in ? v out (v) t j (c) 120 100 80 60 40 20 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 1ma 10ma 30ma 80ma 100ma 200ma 300ma (load current) max t j (do not operate above this point) 06455-034 figure 38. 0 mm 2 of pcb copper, t a = 50c printed circuit board layout considerations heat dissipation from the package can be improved by increasing the amount of copper attached to the pins of the ADP1712/ adp1713/adp1714. however, as can be seen from table 5 , a point of diminishing returns eventually is reached, beyond which an increase in the copper size does not yield significant heat dissipation benefits. place the input capacitor as close as possible to the in and gnd pins. place the output capacitor as close as possible to the out and gnd pins. for the ADP1712 adjustable version, place the soft-start capacitor as close as possible to the ss pin. for the adp1713, place the internal reference bypass capacitor as close as possible to the byp pin. use of 0402 or 0603 size capacitors and resistors achieves the smallest possible footprint solution on boards where area is limited. gnd (bottom) gnd (top) in en r2 r1 c3 out c2 c1 ADP1712/ adp1713/ adp1714 ss/ adj/ byp/ trk 06455-035 figure 39. example pcb layout
ADP1712/adp1713/adp1714 rev. 0 | page 15 of 16 outline dimensions * compliant to jedec standards mo-193-ab with the exception of package height and thickness. pin 1 1.60 bsc 2.80 bsc 1.90 bsc 0.95 bsc 0.20 0.08 0.60 0.45 0.30 8 4 0 0.50 0.30 0.10 max seating plane * 1.00 max * 0.90 0.87 0.84 2.90 bsc 54 12 3 figure 40. 5-lead thin small outline transistor package [tsot] (uj-5) dimensions shown in millimeters ordering guide model temperature range output voltage (v) package description package option branding ADP1712aujz-0.75r7 1 C40c to +125c 0.75 5-lead tsot uj-5 l3s ADP1712aujz-0.8-r7 1 C40c to +125c 0.80 5-lead tsot uj-5 l3t ADP1712aujz-0.85r7 1 C40c to +125c 0.85 5-lead tsot uj-5 l3u ADP1712aujz-0.9-r7 1 C40c to +125c 0.90 5-lead tsot uj-5 l3v ADP1712aujz-0.95r7 1 C40c to +125c 0.95 5-lead tsot uj-5 l3w ADP1712aujz-1.0-r7 1 C40c to +125c 1.00 5-lead tsot uj-5 l3x ADP1712aujz-1.05r7 1 C40c to +125c 1.05 5-lead tsot uj-5 l3y ADP1712aujz-1.1-r7 1 C40c to +125c 1.10 5-lead tsot uj-5 l3z ADP1712aujz-1.15r7 1 C40c to +125c 1.15 5-lead tsot uj-5 l4h ADP1712aujz-1.2-r7 1 C40c to +125c 1.20 5-lead tsot uj-5 l4j ADP1712aujz-1.3-r7 1 C40c to +125c 1.30 5-lead tsot uj-5 l4k ADP1712aujz-1.5-r7 1 C40c to +125c 1.50 5-lead tsot uj-5 l4l ADP1712aujz-1.8-r7 1 C40c to +125c 1.80 5-lead tsot uj-5 l4m ADP1712aujz-2.5-r7 1 C40c to +125c 2.50 5-lead tsot uj-5 l4n ADP1712aujz-3.0-r7 1 C40c to +125c 3.00 5-lead tsot uj-5 l4p ADP1712aujz-3.3-r7 1 C40c to +125c 3.30 5-lead tsot uj-5 l4q ADP1712aujz-r7 1 C40c to +125c 0.8 to 5 5-lead tsot uj-5 l4r
ADP1712/adp1713/adp1714 rev. 0 | page 16 of 16 ?2007 analog devices, inc. all rights reserved. trademarks and registered trademarks are the prop erty of their respective owners. d06455-0-1/07(0) model temperature range output voltage (v) package description package option branding adp1713aujz-0.75r7 1 C40c to +125c 0.75 5-lead tsot uj-5 l4u adp1713aujz-0.8-r7 1 C40c to +125c 0.80 5-lead tsot uj-5 l4v adp1713aujz-0.85r7 1 C40c to +125c 0.85 5-lead tsot uj-5 l4w adp1713aujz-0.9-r7 1 C40c to +125c 0.90 5-lead tsot uj-5 l4x adp1713aujz-0.95r7 1 C40c to +125c 0.95 5-lead tsot uj-5 l4y adp1713aujz-1.0-r7 1 C40c to +125c 1.00 5-lead tsot uj-5 l4z adp1713aujz-1.05r7 1 C40c to +125c 1.05 5-lead tsot uj-5 l50 adp1713aujz-1.1-r7 1 C40c to +125c 1.10 5-lead tsot uj-5 l51 adp1713aujz-1.15r7 1 C40c to +125c 1.15 5-lead tsot uj-5 l52 adp1713aujz-1.2-r7 1 C40c to +125c 1.20 5-lead tsot uj-5 l53 adp1713aujz-1.3-r7 1 C40c to +125c 1.30 5-lead tsot uj-5 l54 adp1713aujz-1.5-r7 1 C40c to +125c 1.50 5-lead tsot uj-5 l55 adp1713aujz-1.8-r7 1 C40c to +125c 1.80 5-lead tsot uj-5 l56 adp1713aujz-2.5-r7 1 C40c to +125c 2.50 5-lead tsot uj-5 l57 adp1713aujz-3.0-r7 1 C40c to +125c 3.00 5-lead tsot uj-5 l58 adp1713aujz-3.3-r7 1 C40c to +125c 3.30 5-lead tsot uj-5 l59 adp1714aujz-0.75r7 1 C40c to +125c 0.75 5-lead tsot uj-5 l5a adp1714aujz-0.8-r7 1 C40c to +125c 0.80 5-lead tsot uj-5 l5c adp1714aujz-0.85r7 1 C40c to +125c 0.85 5-lead tsot uj-5 l5d adp1714aujz-0.9-r7 1 C40c to +125c 0.90 5-lead tsot uj-5 l5e adp1714aujz-0.95r7 1 C40c to +125c 0.95 5-lead tsot uj-5 l5f adp1714aujz-1.0-r7 1 C40c to +125c 1.00 5-lead tsot uj-5 l5g adp1714aujz-1.05r7 1 C40c to +125c 1.05 5-lead tsot uj-5 l5h adp1714aujz-1.1-r7 1 C40c to +125c 1.10 5-lead tsot uj-5 l5j adp1714aujz-1.15r7 1 C40c to +125c 1.15 5-lead tsot uj-5 l5k adp1714aujz-1.2-r7 1 C40c to +125c 1.20 5-lead tsot uj-5 l5l adp1714aujz-1.3-r7 1 C40c to +125c 1.30 5-lead tsot uj-5 l5m adp1714aujz-1.5-r7 1 C40c to +125c 1.50 5-lead tsot uj-5 l5n adp1714aujz-1.8-r7 1 C40c to +125c 1.80 5-lead tsot uj-5 l5p adp1714aujz-2.5-r7 1 C40c to +125c 2.50 5-lead tsot uj-5 l5q adp1714aujz-3.0-r7 1 C40c to +125c 3.00 5-lead tsot uj-5 l5r adp1714aujz-3.3-r7 1 C40c to +125c 3.30 5-lead tsot uj-5 l5s 1 z = pb-free part. ?2007 analog devices, inc. all rights reserved. trademarks and registered trademarks are the prop erty of their respective owners. d06455-0-1/07(0)

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